mini2440之ADS下DMA测试
mini2440之ADS下DMA测试
找到一个dma的ads工程,将其dma功能整到了原来的ads工程TQ2440_Test里面
用帮客之家(Linuxidc.com)提供的main.c替换原来TQ2440_Test的main.c
main.c下载地址:
下载在帮客之家的1号FTP服务器里,下载地址:
FTP地址:ftp://www.bkjia.com
用户名:www.bkjia.com
密码:www.muu.cc
在 2011年LinuxIDC.com\10月\mini2440之ADS下DMA测试
下载方法见 http://www.bkjia.net/thread-1187-1-1.html
之所以要介绍DMA,因为它对性能太重要了!只有活用了DMA,CPU的性能才能上去!S3c2410有四个DMA,每个DMA支持工作方式基本相同,但支持的source Dest可能略有不同,具体见Datasheet。
这里具体DMA CONTROL寄存器(DCON)的配置说明,进而引出DMA的各种工作方式。
Atomic transfer:指的是DMA的单次原子操作,它可以是Unit模式(传输1个data size),也可以是burst模式(传输4个data size),具体对应DCON[28]。
Data Size:指的是单次原子操作的数据位宽,8、16、32,具体对应DCON[21:20]。
Request Source:DMA请求的来源有两种,软件&硬件模块,由DCON[23]控制;当为前者时,由软件对DMASKTRIG寄存器的位0置位触发一次DMA 操作。当为后者时,具体来源由DCON[26:24]控制,不同硬件模块的某时间触发一次DMA操作,具体要见不同的硬件模块。
DMA service mode:DMA的工作模式有两种,单一服务模式&整体服务模式。前一模式下,一次DMA请求完成一项原子操作,并且transfer count的值减1。后一模式下,一次DMA请求完成一批原子操作,直到transfer count等于0表示完成一次整体服务。具体对应DCON[27]。
RELOAD:在reload模式下,当transfer count的值变为零时,将自动加src、dst、TC的值加载到CURR_DST、CURR_SRC、CURR_TC,并开始一次新的DMA传输。该模式一般和整体服务模式一起使用,也就是说当一次整体服务开始后,src、dst、TC的值都已经被加载,因此可以更改为下一次
服务的地址,2410说明文档中建议加入以下语句来判断当前的服务开始,src、dst、TC的值可以被更改了:while((rDSTATn & 0xfffff) == 0) ;
Req&Ack:DMA请求和应答的协议有两种,Demard mode 和 Handshake mode。两者对Request和Ack的时序定义有所不同:在Demard模式下,如果
DMA完成一次请求如果Request仍然有效,那么DMA就认为这是下一次DMA请求;在Handshake模式下,DMA完成一次请求后等待Request信号无效,然后把ACK也置无效,再等待下一次Request。这个设计外部DMA请求时可能要用到。
传输总长度:DMA一次整体服务传输的总长度为:
Data Size × Atomic transfer size × TC(字节)。
- /****************************************************************
- NAME: u2440mon.c
- DESC: u2440mon entry point,menu,download
- ****************************************************************/
- #define GLOBAL_CLK 1
- #include <stdlib.h>
- #include <string.h>
- #include "def.h"
- #include "option.h"
- #include "2440addr.h"
- #include "2440lib.h"
- #include "2440slib.h"
- #include "mmu.h"
- #include "profile.h"
- #include "memtest.h"
- extern char Image$RO$Limit[];
- extern char Image$RO$Base[];
- extern char Image$RW$Limit[];
- extern char Image$RW$Base[];
- extern char Image$ZI$Limit[];
- extern char Image$ZI$Base[];
- void Isr_Init(void);
- void HaltUndef(void);
- void HaltSwi(void);
- void HaltPabort(void);
- void HaltDabort(void);
- void ClearMemory(void);
- void Clk0_Enable(int clock_sel);
- void Clk1_Enable(int clock_sel);
- void Clk0_Disable(void);
- void Clk1_Disable(void);
- extern void Lcd_TFT_Init(void);
- extern void Lcd_TFT_Test( void ) ;
- extern void Test_Touchpanel(void) ;
- extern void Test_Adc(void) ;
- extern void KeyScan_Test(void) ;
- extern void RTC_Display(void) ;
- extern void Test_IrDA_Tx(void) ;
- extern void PlayMusicTest(void) ;
- extern void RecordTest( void ) ;
- extern void Test_Iic(void) ;
- extern void Test_SDI(void) ;
- extern void Camera_Test( void ) ;
- volatile U32 downloadAddress;
- void (*restart)(void)=(void (*)(void))0x0;
- volatile unsigned char *downPt;
- volatile U32 downloadFileSize;
- volatile U16 checkSum;
- volatile unsigned int err=0;
- volatile U32 totalDmaCount;
- volatile int isUsbdSetConfiguration;
- int download_run=0;
- U32 tempDownloadAddress;
- int menuUsed=0;
- extern char Image$RW$Limit[];
- U32 *pMagicNum=(U32 *)Image$RW$Limit;
- int consoleNum;
- static U32 cpu_freq;
- static U32 UPLL;
- static void cal_cpu_bus_clk(void)
- {
- U32 val;
- U8 m, p, s;
- val = rMPLLCON;
- m = (val>>12)&0xff;
- p = (val>>4)&0x3f;
- s = val&3;
- //(m+8)*FIN*2 不要超出32位数!
- FCLK = ((m+8)*(FIN/100)*2)/((p+2)*(1<<s))*100;
- val = rCLKDIVN;
- m = (val>>1)&3;
- p = val&1;
- val = rCAMDIVN;
- s = val>>8;
- switch (m) {
- case 0:
- HCLK = FCLK;
- break;
- case 1:
- HCLK = FCLK>>1;
- break;
- case 2:
- if(s&2)
- HCLK = FCLK>>3;
- else
- HCLK = FCLK>>2;
- break;
- case 3:
- if(s&1)
- HCLK = FCLK/6;
- else
- HCLK = FCLK/3;
- break;
- }
- if(p)
- PCLK = HCLK>>1;
- else
- PCLK = HCLK;
- if(s&0x10)
- cpu_freq = HCLK;
- else
- cpu_freq = FCLK;
- val = rUPLLCON;
- m = (val>>12)&0xff;
- p = (val>>4)&0x3f;
- s = val&3;
- UPLL = ((m+8)*FIN)/((p+2)*(1<<s));
- UCLK = (rCLKDIVN&8)?(UPLL>>1):UPLL;
- }
- /****************************************************************************************************************/
- static volatile unsigned done;
- struct reg
- {
- volatile U32 DISRC;//初始原基地址寄存器
- volatile U32 DISRCC;//初始源控制寄存器
- volatile U32 DIDST;//初始目的基地址寄存器
- volatile U32 DIDSTC;//初始目的控制寄存器
- volatile U32 DCON;//dma控制寄存器
- volatile U32 DSTAT;//状态/计数寄存器
- volatile U32 DCSRC;//当前源地址寄存器
- volatile U32 DCDST;//当前目的地址寄存器
- volatile U32 DMASKTRIG;//dma掩码,触发寄存器
- };//用于描述某个dma通道的9个寄存器
- /*
- 此timer用于计时,使用了看门狗定时器
- watchdog timer看门狗也是一个定时器,比普通定时器多了一个功能,就是在定时器定时结束时会触发
- 一个特殊的事件:重启cpu
- */
- void timer_start(int time)
- {
- rWTCON=((PCLK/1000000-1)<<8)|(time<<3);
- //rWTCON=((PCLK-1)<<8)|(time<<3);
- rWTCNT=0xffff;
- rWTDAT=0xffff;
- rWTCON=rWTCON &~(1<<5)&~(1<<2)|(1<<5);
- }
- /*
- rWTCON
- b8-b15,预分频值
- b3-b4,
- 时钟分频选择
- 00,16
- 01,32
- 10,64
- 11,128*
- b5=1,enable watch dog timer
- b2=0,disable watch dog timer interrupt
- 一般
- fclk=400MHZ
- hclk=100MHZ
- pclk=50MHZ
- 可用输出看一下本板子的频率
- Uart_Printf("FCLK=%d,HCLK=%d,PCLK=%d\n",FCLK,HCLK,PCLK );
- 为
- FCLK=400000000,HCLK=100000000,PCLK=50000000
- 相关寄存器的设置在其他地方
- cal_cpu_bus_clk来查询相关寄存器以确定fclk,hclk,pclk
- rWTCON高8位设置为50x10^6/10^6-1=49,//用PCLK/1000000-1设置其高8位,即使PCLK变化,狗的时间计算方法也不必变
- 时钟分频选择11为128
- 根据2440 spec 狗的周期为 t_watchdog = 1/[ PCLK / (Prescaler value + 1) / Division_factor ]=128*10^(-6) S=128/1000ms
- 所以有如下计算所用时间的公式
- src_to_dst=timer_stop()
- Uart_Printf("DMA transfer done time=%u MS\n",src_to_dst*128/1000);
- */
- int timer_stop(void)
- {
- rWTCON=((PCLK/1000000-1)<<8);
- return (0xffff-rWTCNT);
- }
- /*
- 本例使用dma传输数据的步骤
- 1.指定dma传输完成中断处理函数,设置源目的寄存器,传输次数,传输模式等
- 2.向cpu发出dma传输请求信号,请求cpu将总线控制权交释放,dma控制器控制数据在两个内存区间经由总线传输,
- 可以是外部引脚请求dma传输,
- 也可以是设置寄存器DMASKTRIG b0来产生请求dma传输
- 到底是哪个,由寄存器DCON b23决定
- 3.比如dma0传输完成,则自动产生dma0中断请求信号,要在中断处理程序中手动清除中断请求位
- */
- void __irq DMA0done(void)
- {
- done=1;
- ClearPending(BIT_DMA0);
- }
- void __irq DMA1done(void)
- {
- done=1;
- ClearPending(BIT_DMA1);
- }
- void __irq DMA2done(void)
- {
- done=1;
- ClearPending(BIT_DMA2);
- }
- void __irq DMA3done(void)
- {
- done=1;
- ClearPending(BIT_DMA3);
- }
- void DMA_move(int ch,int srcaddr,int dstaddr,int tc,int dsz,int tsz)
- {
- int i;
- struct reg *pDMA;
- int src_to_dst;
- int sum0=0,sum1=0;
- int length;
- length=tc*((tsz)?4:1)*((dsz==0)*1+(dsz==1)*2+(dsz==2)*4);
- /*tc传输次数
- tsz每次传输几个数据类型,tsz=0为1个,tsz=1为4个
- dsz传输的数据类型,dsz=0为字节,dsz=1为半字,dsz=2为字,dsz=3未指定
- 所以有上面的length计算
- 见2440 spec
- */
- switch(ch)
- {
- case 0:
- pISR_DMA0=(unsigned)DMA0done;//指定dma0中断处理程序为DMA0done
- EnableIrq(BIT_DMA0);//允许dma0通道产生数据传输完成中断(设置中断掩码寄存器0x4a000008)
- pDMA=(void *)0x4b000000;//使pDMA指向通道0的9个寄存器
- break;
- case 1:
- pISR_DMA1=(unsigned)DMA1done;
- EnableIrq(BIT_DMA1);
- pDMA=(void *)0x4b000040;
- break;
- case 2:
- pISR_DMA2=(unsigned)DMA2done;
- EnableIrq(BIT_DMA2);
- pDMA=(void *)0x4b000080;
- break;
- case 3:
- pISR_DMA3=(unsigned)DMA3done;
- EnableIrq(BIT_DMA3);
- pDMA=(void *)0x4b0000c0;
- break;
- default:
- Uart_Printf("channel error\n");
- break;
- }
- for(i=srcaddr;i<(srcaddr+length);i+=4)//sum0和sum1用于校验传输是够正确
- {
- *((U32 *)i)=i^0x55aa5aa5;//按位异或
- sum0+=i^0x55aa5aa5;
- }
- Uart_Printf("DMA%d %8xh->%8xh,size=%xh(tc=%xh),dsz=%d,burst=%d\n",ch,
- srcaddr,dstaddr,length,tc,dsz,tsz);
- done=0;
- pDMA->DISRC=srcaddr;//源地址
- pDMA->DISRCC=(0<<1)|(0<<0);//源地址所在总线为ahb,源地址自动增加 0 或1 2 4(由dsz定)
- pDMA->DIDST=dstaddr;//目的地址
- pDMA->DIDSTC=(0<<1)|(0<<0);//目的地址所在总线为ahb,目的地址自动增加0 或1 2 4(由dsz定)
- pDMA->DCON=(1<<31)|(1<<30)|(1<<29)|(tsz<<28)|(1<<27)|(0<<23)|(1<<22)|(dsz<<20)|(tc);
- /*
- b31=1单服务握手
- b30=1与hclk同步,高速外设
- b29=1当所有的传输结束时,产生中断请求
- b28=tsz ,每次所要传输的数据类型个数
- tsz=1,执行4数据长的突发传输 boost
- tsz=0.执行单数据传输
- note:dma执行期间,和cpu可以交替占有总线
- b27=1,全服务传输,不查询dreq,但传输一次也要释放总线
- b23=0,由软件方式产生dma请求,需要用DMASKTRIG寄存器的SW_TRIG位置1触发
- b21-b20=dsz,每次传输的数据类型设置
- dsz=00,字节
- dsz=01,半字
- dsz=10,字
- dsz=11,保留
- b19-b0=tc,传输次数,每次自动减1,直至减到0,便产生dma传输完成中断**********************
- */
- pDMA->DMASKTRIG=(1<<1)|(1);
- /*
- b1=1,开放通道
- b0=1,此b0是dma软件触发位,实现软件触发dma请求
- */
- timer_start(3);//开始计时
- while(done==0);//在done=1之前cpu一直在此循环,实际中的dma传输计时不可能是这样,dma传输期间,cpu可以可以去执行其他任务
- src_to_dst=timer_stop();//停止计时,返回本次dma传输所用时间
- Uart_Printf("DMA transfer done time=%u MS\n",src_to_dst*128/1000);
- DisableIrq(BIT_DMA0);
- DisableIrq(BIT_DMA1);
- DisableIrq(BIT_DMA2);
- DisableIrq(BIT_DMA3);
- for(i=dstaddr;i<(dstaddr+length);i+=4)
- sum1+=i^0x55aa5aa5;
- Uart_Printf("sum0=%2x,sum1=%2x\n",sum0,sum1);
- if(sum0==sum1)
- Uart_Printf("DMA test OK\n");
- else
- Uart_Printf("DMA test failured\n");
- }
- void DMA_test(void)
- {
- DMA_move(0,_NONCACHE_STARTADDRESS,_NONCACHE_STARTADDRESS+0x800000,0x80000,0,0); //byte,single
- DMA_move(0,_NONCACHE_STARTADDRESS,_NONCACHE_STARTADDRESS+0x800000,0x40000,1,0); //halfword,single
- DMA_move(0,_NONCACHE_STARTADDRESS,_NONCACHE_STARTADDRESS+0x800000,0x20000,2,0); //word,single
- DMA_move(0,_NONCACHE_STARTADDRESS,_NONCACHE_STARTADDRESS+0x800000,0x20000,0,1); //byte,burst
- DMA_move(0,_NONCACHE_STARTADDRESS,_NONCACHE_STARTADDRESS+0x800000,0x10000,1,1); //halfword,burst
- DMA_move(0,_NONCACHE_STARTADDRESS,_NONCACHE_STARTADDRESS+0x800000, 0x8000,2,1); //word,burst
- //DMA Ch 1
- DMA_move(1,_NONCACHE_STARTADDRESS,_NONCACHE_STARTADDRESS+0x800000,0x80000,0,0); //byte,single
- DMA_move(1,_NONCACHE_STARTADDRESS,_NONCACHE_STARTADDRESS+0x800000,0x40000,1,0); //halfword,single
- DMA_move(1,_NONCACHE_STARTADDRESS,_NONCACHE_STARTADDRESS+0x800000,0x20000,2,0); //word,single
- DMA_move(1,_NONCACHE_STARTADDRESS,_NONCACHE_STARTADDRESS+0x800000,0x20000,0,1); //byte,burst
- DMA_move(1,_NONCACHE_STARTADDRESS,_NONCACHE_STARTADDRESS+0x800000,0x10000,1,1); //halfword,burst
- DMA_move(1,_NONCACHE_STARTADDRESS,_NONCACHE_STARTADDRESS+0x800000, 0x8000,2,1); //word,burst
- //DMA Ch 2
- DMA_move(2,_NONCACHE_STARTADDRESS,_NONCACHE_STARTADDRESS+0x800000,0x80000,0,0); //byte,single
- DMA_move(2,_NONCACHE_STARTADDRESS,_NONCACHE_STARTADDRESS+0x800000,0x40000,1,0); //halfword,single
- DMA_move(2,_NONCACHE_STARTADDRESS,_NONCACHE_STARTADDRESS+0x800000,0x20000,2,0); //word,single
- DMA_move(2,_NONCACHE_STARTADDRESS,_NONCACHE_STARTADDRESS+0x800000,0x20000,0,1); //byte,burst
- DMA_move(2,_NONCACHE_STARTADDRESS,_NONCACHE_STARTADDRESS+0x800000,0x10000,1,1); //halfword,burst
- DMA_move(2,_NONCACHE_STARTADDRESS,_NONCACHE_STARTADDRESS+0x800000, 0x8000,2,1); //word,burst
- //DMA Ch 3
- DMA_move(3,_NONCACHE_STARTADDRESS,_NONCACHE_STARTADDRESS+0x800000,0x80000,0,0); //byte,single
- DMA_move(3,_NONCACHE_STARTADDRESS,_NONCACHE_STARTADDRESS+0x800000,0x40000,1,0); //halfword,single
- DMA_move(3,_NONCACHE_STARTADDRESS,_NONCACHE_STARTADDRESS+0x800000,0x20000,2,0); //word,single
- DMA_move(3,_NONCACHE_STARTADDRESS,_NONCACHE_STARTADDRESS+0x800000,0x20000,0,1); //byte,burst
- DMA_move(3,_NONCACHE_STARTADDRESS,_NONCACHE_STARTADDRESS+0x800000,0x10000,1,1); //halfword,burst
- DMA_move(3,_NONCACHE_STARTADDRESS,_NONCACHE_STARTADDRESS+0x800000, 0x8000,2,1);
- }
- /****************************************************************************************************************/
- void Temp_function()
- { Uart_Printf("\nPlease input 1-11 to select test!!!\n"); }
- struct {
- void (*fun)(void);
- char *tip;
- }CmdTip[] = {
- { Temp_function, "Please input 1-11 to select test,song" } ,
- { BUZZER_PWM_Test, "Test PWM" } ,
- { RTC_Display, "RTC time display" } ,
- { Test_Adc, "Test ADC" } ,
- { KeyScan_Test, "Test interrupt and key scan" } ,
- { Test_Touchpanel, "Test Touchpanel" } ,
- { Lcd_TFT_Test, "Test TFT LCD" } ,
- { Test_Iic, "Test IIC EEPROM" } ,
- { PlayMusicTest, "UDA1341 play music" } ,
- { RecordTest, "UDA1341 record voice" } ,
- { Test_SDI, "Test SD Card" } ,
- { Camera_Test, "Test CMOS Camera"},
- { DMA_test, "Test dma"};//add by song
- { 0, 0}
- };
- void Main(void)
- {
- char *mode;
- int i;
- U8 key;
- U32 mpll_val = 0 ;
- //U32 divn_upll = 0 ;
- #if ADS10
- // __rt_lib_init(); //for ADS 1.0
- #endif
- Port_Init();
- Isr_Init();
- i = 2 ; //don't use 100M!
- switch ( i ) {
- case 0: //200
- key = 12;
- mpll_val = (92<<12)|(4<<4)|(1);
- break;
- case 1: //300
- key = 13;
- mpll_val = (67<<12)|(1<<4)|(1);
- break;
- case 2: //400
- key = 14;
- mpll_val = (92<<12)|(1<<4)|(1);
- break;
- case 3: //440!!!
- key = 14;
- mpll_val = (102<<12)|(1<<4)|(1);
- break;
- default:
- key = 14;
- mpll_val = (92<<12)|(1<<4)|(1);
- break;
- }
- //init FCLK=400M, so change MPLL first
- ChangeMPllValue((mpll_val>>12)&0xff, (mpll_val>>4)&0x3f, mpll_val&3);
- ChangeClockDivider(key, 12);
- cal_cpu_bus_clk();
- consoleNum = 0; // Uart 1 select for debug.
- Uart_Init( 0,115200 );
- Uart_Select( consoleNum );
- Beep(2000, 1000);
- Uart_SendByte('\n');
- Uart_Printf("<***************************************>\n");
- Uart_Printf(" TQ2440 Test Program\n");
- Uart_Printf(" www.embedsky.net\n");
- Uart_Printf(" Build time is: %s %s\n", __DATE__ , __TIME__ );
- Uart_Printf("<***************************************>\n");
- rMISCCR=rMISCCR&~(1<<3); // USBD is selected instead of USBH1
- rMISCCR=rMISCCR&~(1<<13); // USB port 1 is enabled.
- rDSC0 = 0x2aa;
- rDSC1 = 0x2aaaaaaa;
- //Enable NAND, USBD, PWM TImer, UART0,1 and GPIO clock,
- //the others must be enabled in OS!!!
- rCLKCON = 0xfffff0;
- MMU_Init(); //
- pISR_SWI=(_ISR_STARTADDRESS+0xf0); //for pSOS
- Led_Display(0x66);
- mode="DMA";
- Clk0_Disable();
- Clk1_Disable();
- mpll_val = rMPLLCON;
- Lcd_TFT_Init() ; // LCD initial
- download_run=1; //The default menu is the Download & Run mode.
- while(1)
- {
- U8 idx;
- Uart_Printf("\nPlease select function : \n");
- for(i=0; CmdTip[i].fun!=0; i++)
- Uart_Printf("%d : %s\n", i, CmdTip[i].tip);
- idx = Uart_GetIntNum_GJ() ;
- if(idx<i)
- {
- (*CmdTip[idx].fun)();
- Delay(20);
- Uart_Init( 0,115200 );
- }
- }
- }
- void Isr_Init(void)
- {
- pISR_UNDEF=(unsigned)HaltUndef;
- pISR_SWI =(unsigned)HaltSwi;
- pISR_PABORT=(unsigned)HaltPabort;
- pISR_DABORT=(unsigned)HaltDabort;
- rINTMOD=0x0; // All=IRQ mode
- rINTMSK=BIT_ALLMSK; // All interrupt is masked.
- }
- void HaltUndef(void)
- {
- Uart_Printf("Undefined instruction exception!!!\n");
- while(1);
- }
- void HaltSwi(void)
- {
- Uart_Printf("SWI exception!!!\n");
- while(1);
- }
- void HaltPabort(void)
- {
- Uart_Printf("Pabort exception!!!\n");
- while(1);
- }
- void HaltDabort(void)
- {
- Uart_Printf("Dabort exception!!!\n");
- while(1);
- }
- void ClearMemory(void)
- {
- int memError=0;
- U32 *pt;
- Uart_Printf("Clear Memory (%xh-%xh):WR",_RAM_STARTADDRESS,HEAPEND);
- pt=(U32 *)_RAM_STARTADDRESS;
- while((U32)pt < HEAPEND)
- {
- *pt=(U32)0x0;
- pt++;
- }
- if(memError==0)Uart_Printf("\b\bO.K.\n");
- }
- void Clk0_Enable(int clock_sel)
- { // 0:MPLLin, 1:UPLL, 2:FCLK, 3:HCLK, 4:PCLK, 5:DCLK0
- rMISCCR = rMISCCR&~(7<<4) | (clock_sel<<4);
- rGPHCON = rGPHCON&~(3<<18) | (2<<18);
- }
- void Clk1_Enable(int clock_sel)
- { // 0:MPLLout, 1:UPLL, 2:RTC, 3:HCLK, 4:PCLK, 5:DCLK1
- rMISCCR = rMISCCR&~(7<<8) | (clock_sel<<8);
- rGPHCON = rGPHCON&~(3<<20) | (2<<20);
- }
- void Clk0_Disable(void)
- {
- rGPHCON = rGPHCON&~(3<<18); // GPH9 Input
- }
- void Clk1_Disable(void)
- {
- rGPHCON = rGPHCON&~(3<<20); // GPH10 Input
- }
- Please select function :
- 0 : Please input 1-11 to select test,song
- 1 : Test PWM
- 2 : RTC time display
- 3 : Test ADC
- 4 : Test interrupt and key scan
- 5 : Test Touchpanel
- 6 : Test TFT LCD
- 7 : Test IIC EEPROM
- 8 : UDA1341 play music
- 9 : UDA1341 record voice
- 10 : Test SD Card
- 11 : Test CMOS Camera
- 12 : Test dma
- 12DMA0 31000000h->31800000h,size=80000h(tc=80000h),dsz=0,burst=0
- DMA transfer done time=154 MS
- sum0=fffe0000,sum1=fffe0000
- DMA test OK
- DMA0 31000000h->31800000h,size=80000h(tc=40000h),dsz=1,burst=0
- DMA transfer done time=77 MS
- sum0=fffe0000,sum1=fffe0000
- DMA test OK
- DMA0 31000000h->31800000h,size=80000h(tc=20000h),dsz=2,burst=0
- DMA transfer done time=38 MS
- sum0=fffe0000,sum1=fffe0000
- DMA test OK
- DMA0 31000000h->31800000h,size=80000h(tc=20000h),dsz=0,burst=1
- DMA transfer done time=68 MS
- sum0=fffe0000,sum1=fffe0000
- DMA test OK
- DMA0 31000000h->31800000h,size=80000h(tc=10000h),dsz=1,burst=1
- DMA transfer done time=34 MS
- sum0=fffe0000,sum1=fffe0000
- DMA test OK
- DMA0 31000000h->31800000h,size=80000h(tc=8000h),dsz=2,burst=1
- DMA transfer done time=12 MS
- sum0=fffe0000,sum1=fffe0000
- DMA test OK
- DMA1 31000000h->31800000h,size=80000h(tc=80000h),dsz=0,burst=0
- DMA transfer done time=154 MS
- sum0=fffe0000,sum1=fffe0000
- DMA test OK
- DMA1 31000000h->31800000h,size=80000h(tc=40000h),dsz=1,burst=0
- DMA transfer done time=77 MS
- sum0=fffe0000,sum1=fffe0000
- DMA test OK
- DMA1 31000000h->31800000h,size=80000h(tc=20000h),dsz=2,burst=0
- DMA transfer done time=38 MS
- sum0=fffe0000,sum1=fffe0000
- DMA test OK
- DMA1 31000000h->31800000h,size=80000h(tc=20000h),dsz=0,burst=1
- DMA transfer done time=68 MS
- sum0=fffe0000,sum1=fffe0000
- DMA test OK
- DMA1 31000000h->31800000h,size=80000h(tc=10000h),dsz=1,burst=1
- DMA transfer done time=34 MS
- sum0=fffe0000,sum1=fffe0000
- DMA test OK
- DMA1 31000000h->31800000h,size=80000h(tc=8000h),dsz=2,burst=1
- DMA transfer done time=12 MS
- sum0=fffe0000,sum1=fffe0000
- DMA test OK
- DMA2 31000000h->31800000h,size=80000h(tc=80000h),dsz=0,burst=0
- DMA transfer done time=154 MS
- sum0=fffe0000,sum1=fffe0000
- DMA test OK
- DMA2 31000000h->31800000h,size=80000h(tc=40000h),dsz=1,burst=0
- DMA transfer done time=77 MS
- sum0=fffe0000,sum1=fffe0000
- DMA test OK
- DMA2 31000000h->31800000h,size=80000h(tc=20000h),dsz=2,burst=0
- DMA transfer done time=38 MS
- sum0=fffe0000,sum1=fffe0000
- DMA test OK
- DMA2 31000000h->31800000h,size=80000h(tc=20000h),dsz=0,burst=1
- DMA transfer done time=68 MS
- sum0=fffe0000,sum1=fffe0000
- DMA test OK
- DMA2 31000000h->31800000h,size=80000h(tc=10000h),dsz=1,burst=1
- DMA transfer done time=34 MS
- sum0=fffe0000,sum1=fffe0000
- DMA test OK
- DMA2 31000000h->31800000h,size=80000h(tc=8000h),dsz=2,burst=1
- DMA transfer done time=12 MS
- sum0=fffe0000,sum1=fffe0000
- DMA test OK
- DMA3 31000000h->31800000h,size=80000h(tc=80000h),dsz=0,burst=0
- DMA transfer done time=154 MS
- sum0=fffe0000,sum1=fffe0000
- DMA test OK
- DMA3 31000000h->31800000h,size=80000h(tc=40000h),dsz=1,burst=0
- DMA transfer done time=77 MS
- sum0=fffe0000,sum1=fffe0000
- DMA test OK
- DMA3 31000000h->31800000h,size=80000h(tc=20000h),dsz=2,burst=0
- DMA transfer done time=38 MS
- sum0=fffe0000,sum1=fffe0000
- DMA test OK
- DMA3 31000000h->31800000h,size=80000h(tc=20000h),dsz=0,burst=1
- DMA transfer done time=68 MS
- sum0=fffe0000,sum1=fffe0000
- DMA test OK
- DMA3 31000000h->31800000h,size=80000h(tc=10000h),dsz=1,burst=1
- DMA transfer done time=34 MS
- sum0=fffe0000,sum1=fffe0000
- DMA test OK
- DMA3 31000000h->31800000h,size=80000h(tc=8000h),dsz=2,burst=1
- DMA transfer done time=12 MS
- sum0=fffe0000,sum1=fffe0000
- DMA test OK
评论暂时关闭